| Grundinformation: | |
| Veröffentlicht | 2017 |
| Segment | Server |
| Socket | Socket SP3 |
| Anzahl der Kerne | 32 |
| Anzahl der Threads | 64 |
| Grundfrequenz | 2100 MHz |
| Turbo Core | 2900 MHz |
| Freigeschalteter Multiplikator | keine |
| Architektur (Kern) | Naples |
| Lithographie | 14 nm |
| Transistoren, Mil. | 4800 |
| TDP | 120 W |
| Produkt-Website | öffnen > |
| Interner Speicher | |
| L1 Cache, Кb | 32x64 + 32x32 |
| L2 Cache, Кb | 32x512 |
| L3 Cache, Кb | 65536 |
| Integrierte Module | |
| iGPU | keine |
| Speichercontroller | 8-Kanal (DDR4-2666) ECC memory support |
| PCIe-Controller | PCI Express 3.0 (128 Lanes) |
| Andere Module |
• GPIO • I2C controller • LPC bus • Secure processor • SPI controller • USB 3.0 controller |
| Anweisungen, Technologien | |
|
• MMX • SSE • SSE2 • SSE3 • SSSE3 • SSE4 (SSE4.1 + SSE4.2) • SSE4A • AES (Advanced Encryption Standard) • AVX (Advanced Vector Extensions) • AVX 2 (Advanced Vector Extensions) • BMI1 (Bit Manipulation inst. 1) |
• SHA (Secure Hash Algorithm extensions) • F16C (16-bit Floating-Point conversion) • FMA3 (3-operand Fused Multiply-Add) • AMD64 • EVP (Enhanced Virus Protection) • AMD-V (AMD Virtualization) • SMAP (Supervisor Mode Access Prevention) • SMEP • Precision Boost • SMT (Simultaneous MultiThreading) |
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